finally got some memory working on the FPGA

So since I first picked up this Xilinx Spartan-3E starter kit evaluation board, I’ve been trying to get some memory working on the FPGA.  The DDR is as elusive as beast as I can find.  I’ve not yet given up, but I tried something today and got it working at 3am local time. 🙂

I used the block memory generator from coregen, generated a single port RAM, and then instantiated within my own project.  Which is a state machine.  I write a value in state 1 in address 0, write a value in state 2 in address 1, and then read address 0 and read address 1 in states 3 and 4.  Pretty neat.

Not at all tough, and there’s alot more hidden documentation and templates/code examples built into ISE.  Now knowing the stuff was there, was, the umm, hard part.

Anyways, I was able to add 64k bytes, which I think is impressive…..I am using 8 of the 20 RAMB16’s to do it…..

More after I get some sleep!