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inital results on error correction

While I have yet to actually implement the full-scale error correction as I want to, I did some manual tests today. I basically took a track that I was erroring out on, and swapped in 1-bit away values for the bad bytes.  In some cases, it appeared...

Latest articles

Recapping a Samsung 204B monitor

In September 2006, I bought a Samsung 204B SyncMaster monitor for $320 plus tax. It was a 4:3 monitor, ideal for specific tasks like my Logic Analyzer Cart. In July 2024, the monitor stopped working and wouldn’t power...

PCB ordered from Seeed Studio

I placed the order late last night for the PCB! The PCB design is obviously finished, fully passes the kicad DRC checks, the problems with the footprints were solved. I’ve decided to go with Seeed Studio’s...

new read routine implementation started

Last night, until 3am, I spent redoing my read routine to incorporate the method discussed in the comment of the last post. Basically, I use the time between the pulses as an indication of the data.  I store 2-bit...

added byte-sync to my transfer routine

Well, after much thought, pondering, and discussion with David, I finally implemented a working byte-sync routine to my SX software. I don’t have it fully working with the PC side software yet, because this...

Histogram of one track

Here’s a histogram of one track off an amiga floppy disk.  Notice the peaks near 4us, 6us, and 8us. I’ve got this data from my logic analyzer, crunched through my little C proggie, and then graphed with...

switching design from DRAM to ALTRAMs

So as my last couple posts alluded to, I’ve been having problems with my DRAM-based design. My controller isn’t dual-port. And I’ve been trying to wrap my head around a time-slot method for arbitration...