techtravels.org

inital results on error correction

While I have yet to actually implement the full-scale error correction as I want to, I did some manual tests today. I basically took a track that I was erroring out on, and swapped in 1-bit away values for the bad bytes.  In some cases, it appeared...

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even first or odd?

Despite having a couple different official sources, both AFR.c and floppy.c from the fellow amiga emulator says that the even bits come before the odd bits. This is true in the sector header decoding as well as in the...

slacking indeed

I’ve been horrible about the project lately.  Dunno why. Today is the first time I’ve looked at it in quite some time.  The last couple hours have been spent trying to remember exactly where I’ve been...

new timing image

I think this is timing from like 97 or so, and this is pretty good. I’ve switched to 93 for the time being, because I’ve had the best results with that. This still shows accurate reading of this particular...

Halloween 2007 AFP updates

DTR-based PC to SX flow control is now enabled and working, thanks to jd2xx. It has been tested, and SX responds appropriately to a STOP request. Strangely, with the new jd2xx code, it doesn’t appear that flow...

man am I a slacker

Yeah, I’ve been slacking lately on the project. School has been keeping me busy, work too. My current problem is that something seems up with the data checksum routine, the code on the PC that is processing the...

PC to SX transfer images

I haven’t spent much time within the last few days on the project. Looking at the data on the PC, I think that there are still some problems. I think the problems lie in the fact that the interface to the parallel...

memory chip mounted

Welp, I got impatient, and went to Radio Shack to buy their soldering station. I still have mine coming in the mail, but its ground from Arizona, which may as well be ground from Alaska. I soldered the header pins onto...

funky idle routine

I’m making some progress. On a whim, I told my software to never go idle, to simply stream data constantly. I’ve never liked how I handle the idle state, and I currently lose whatever data thats in the shift...

revisited memory routines

I was looking over my reading and writing routines. Minimums for the fram are Clock high min. 28ns Clock low min. 28ns Data setup min 5ns I write in two places: First, when bits are coming in from the drive, and the ISR...