techtravels.org

inital results on error correction

While I have yet to actually implement the full-scale error correction as I want to, I did some manual tests today. I basically took a track that I was erroring out on, and swapped in 1-bit away values for the bad bytes.  In some cases, it appeared...

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PC to SX transfer images

I haven’t spent much time within the last few days on the project. Looking at the data on the PC, I think that there are still some problems. I think the problems lie in the fact that the interface to the parallel...

added version control and another command

I’ve really wanted version control for a long time.  The ability to go back and undo diverse changes across sessions is valuable.  I also feel a little safer and don’t mind doing semi-destructive edits...

looking at the code this a.m.

Welp, I decided to take a look at my code today, although I can’t actually implement anything until after I get home from work. 🙂 Not sure if I mentioned this eariler, but I’m now padding the data sent from...

Halloween 2007 AFP updates

DTR-based PC to SX flow control is now enabled and working, thanks to jd2xx. It has been tested, and SX responds appropriately to a STOP request. Strangely, with the new jd2xx code, it doesn’t appear that flow...

still giving me trouble

I spent some time on the project last night.  Still no-go. The SX and the software is behaving as expected by responding to commands, transferring the buffer, so and so forth.  I’m getting garbage data from the...

new timing image

I think this is timing from like 97 or so, and this is pretty good. I’ve switched to 93 for the time being, because I’ve had the best results with that. This still shows accurate reading of this particular...

more followup winIO vs inpoup32

I did a little informal write test. A small tight loop that simply raises pin 1 and then lowers it again. Both in as little code as possible, as clean as possible. WINIO: Total time to raise and lower again, 2.5us...

man am I a slacker

Yeah, I’ve been slacking lately on the project. School has been keeping me busy, work too. My current problem is that something seems up with the data checksum routine, the code on the PC that is processing the...

revisited memory routines

I was looking over my reading and writing routines. Minimums for the fram are Clock high min. 28ns Clock low min. 28ns Data setup min 5ns I write in two places: First, when bits are coming in from the drive, and the ISR...