techtravels.org

inital results on error correction

While I have yet to actually implement the full-scale error correction as I want to, I did some manual tests today. I basically took a track that I was erroring out on, and swapped in 1-bit away values for the bad bytes.  In some cases, it appeared...

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a little code review today

While my send UART code has been pretty solid for some time, I’ve always though my receive uart code needed doublechecked and worked on. I spent some time today just going through the code, graphing out some...

more followup winIO vs inpoup32

I did a little informal write test. A small tight loop that simply raises pin 1 and then lowers it again. Both in as little code as possible, as clean as possible. WINIO: Total time to raise and lower again, 2.5us...

SlackFest 2007

Ok, I’ll admit it.  I’ve been slacking like the best of them. I’m not horribly unsatisified with my progress, especially this year.  The first four months of this year I achieved the following: * Whole...

SX EOL

I hate when this happens. 🙂 The Parallax SX microcontroller line has reached production EOL. The owner of the SX design (www.ubicom.com) has given Parallax final notice that we are to place a lifetime buy of wafers. We...

Timing image

I just wanted to throw this up here to show an example of how the timing is working on my project. Its working well. Top line is the input signal from the drive. Bottom line is the firing of interrupts, either from the...

Parallel port access in win 2k

Accessing the parallel port directly under Windows 2000, XP, etc in a standard user app is not natively available, but there are a couple different solutions available. The free one I use is called WinIo, and it is...

out of the country!

I just left Amsterdam, and now am spending some time in Brussels.
I have some preliminary photos up in the gallery.

Floppy project is still on my mind!
 

Found one issue

Well, within an hour or so of getting my new LogicPort logic analyzer hooked up, I’m at least noticing some symptoms that I haven’t seen before. The drive is putting out(or the logic analyzer and my sx is...

updates

I originally thought that the SX might be sending the data too fast for the PC to handle. As my last post mentioned, one full cycle is 12us, but who knows if this is during a disk-write, going into the cache, etc. I...

basic schematic

I put up a rough schematic of my design.  It’s not perfect, and will be updated in the near future, but if you are interested.
Click the image below for a full size image.