While I have yet to actually implement the full-scale error correction as I want to, I did some manual tests today. I basically took a track that I was erroring out on, and swapped in 1-bit away values for the bad bytes. In some cases, it appeared...
created testbench for state machine / block ram tester
So tonight I fooled around with ISIM, which is Xilinx’s simulator. I was doing behavior simulation and wrote a small testbench for the block ram state machine that I wrote a few days ago. Really neat stuff...
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